Abstract
This work presents a compact, circuit-level model for resistive random-access memories (ReRAMs) that combines physical consistency with computational efficiency. Within a memristive framework, device history is explicitly captured through a state variable describing the cumulative evolution of the active region of the conductive filament. The filament transition region is modeled as a network of parallel stochastic conductive paths governed by voltage-dependent switching probabilities calibrated from experimental data, enabling accurate reproduction of intrinsic IV variability. Electrical transport is described using closed-form expressions that capture ohmic conduction in the low-resistance state and nonlinear behavior in the high-resistance state. The model is fully implemented in HSPICE and calibrated using HfO2-based 1T1R devices. Circuit-level validation demonstrates accurate reproduction of electrical characteristics, variability, multilevel operation, and logic-in-memory functionality.
| Original language | English |
|---|---|
| Article number | 109349 |
| Journal | Solid-State Electronics |
| Volume | 234 |
| DOIs | |
| State | Published - Jun 2026 |
Keywords
- Device history
- ReRAM model
- Resistive switching
- Stochastic process
- Switching probability
- Variability
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