Design of a Gate Driver Based-on E-mode p-GaN HEMTs Handling 650V/10A GaN Power Device

Nataly Pozo, Luis Miguel Procel, Lionel Trojman

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper presents the design of a monolithically integrated Gallium Nitride (GaN)-IC gate driver based on Enhancement-mode p-GaN HEMT technology. The design uses 650V GaN-on-SOI Process Designing Kit (PDK). The design complexity of this technology lies in the absence of p-type devices. Consequently, Resistor-Transistor Logic (RTL) inverters and Push-Pull Buffers are introduced instead of a complementary logic. To effectively handle the power device (650V/10A) switching, the gate driver is sized to achieve 7V in the output. To validate the performance of the proposed gate driver, transistor-level and post-layout simulations are carried out considering an input signal of 2MHz. Turn-on/turn-off time (3.77ns/2.32ns), overall circuit efficiency (99.3%) and temperature variation effects are analysed.

Original languageEnglish
Title of host publication2024 22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages333-337
Number of pages5
ISBN (Electronic)9798350361759
DOIs
StatePublished - 2024
Event22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024 - Sherbrooke, Canada
Duration: 16 Jun 202419 Jun 2024

Publication series

Name2024 22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024

Conference

Conference22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024
Country/TerritoryCanada
CitySherbrooke
Period16/06/2419/06/24

Keywords

  • Enhancement-mode
  • GaN-IC
  • Gallium Nitride
  • Gate Driver
  • Integrated Circuit IC
  • p-GaN HEMT

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