Low-complexity Dual Voltage Level Circuitry For Voltage-Divider-Based Content-Addressable Memory (CAM) Based On Two Supply Voltages

Content addressable memories have raised great interest involving the realm of Big Data and Artificial Intelligence, along with the emerging non-volatile (eNV) technology magnetic tunnel junction (MTJ) devices capabilities, they are exploited for massive parallel search operations through (NV-CAMs). A voltage-divider-based NV-BCAM/TCAM has been previously proposed, showing promising characteristics and potential for reliable search operations. Nevertheless, the NV-BCAM relies on two voltage levels to perform write and search operations and does not take into account its periphery design. Hence, the proposed paper presents an NV-BCAM Dual Voltage Level Circuitry design, based on a full-custom methodology, that relies on a low-complexity Voltage-Mode Selector (VMS). Sizing analysis along with Monte Carlo simulations were performed for the designed periphery. In particular, the proposed dual voltage level circuitry will allow for the control of search and write operations in the NV-BCAM memory, delivering V_write=V_DD and V_search=0.6V through a single voltage supply (V_DD=1.1V) and further reducing the top-level complexity design.