New Insight for next Generation SRAM: Tunnel FET versus FinFET for Different Topologies

Adriana Arevalo, Romain Liautard, Daniel Romero, Lionel Trojman, Luis Miguel Procel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

The purpose of this work is to point out the main differences between a Static Random-Access Memory (SRAM) cells implemented by using Tunnel FET (TFET) and FinFET technologies. We have compared the behavior of SRAM cells implemented in both technologies cells for a supply voltage range from 0.4V to 1.2V. Furthermore, for our study, we have chosen different SRAM cell topologies, such as 6T, 8T, 9T and 10T. Therefore, we have simulated all of these topologies for both technologies and extracted the Static Noise Margins (SNM) for the reading and writing processes. In addition, we have determined the power consumption in order to find the best trade-off between stability and power. By analyzing these results, we have determined the best topology for each technology. Finally, we have compared these best topologies for each technology in order to perform a study of advantages and shortcomings. Our results show more advantages using TFET technology instead of FinFET one.

Original languageEnglish
Title of host publicationProceedings - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019
PublisherAssociation for Computing Machinery, Inc
ISBN (Electronic)9781450368445
DOIs
StatePublished - 26 Aug 2019
Event32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019 - Sao Paulo, Brazil
Duration: 26 Aug 201930 Aug 2019

Publication series

NameProceedings - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019

Conference

Conference32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019
Country/TerritoryBrazil
CitySao Paulo
Period26/08/1930/08/19

Keywords

  • FinFET
  • Low Voltage
  • SRAM memory
  • Stability Analysis
  • Static Noise Margins
  • Tunnel-FET

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