Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications

Esteban Garzon; Benjamin Zambrano; Tatiana Moposita; Ramiro Taco; Luis Miguel Procel; Lionel Trojman

doi:10.1109/LASCAS45839.2020.9069027

Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications

Esteban Garzon
, Benjamin Zambrano
, Tatiana Moposita
, Ramiro Taco
, Luis Miguel Procel
, Lionel Trojman

University of Calabria
Universidad San Francisco de Quito
Bar Ilan University
Télécommunication et Électronique (LISITE)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

21 Scopus citations

Abstract

The unique properties of spin-transfer torque magnetic tunnel junctions (STT-MTJs) have led to promising designs for logic and memory applications. Additionally, STT-MTJ based circuits have shown attractive potential to design efficient non-volatile logic-in-memory (NV-LIM) architectures, which assure low power and increased speed. This paper proposes a bit-level reconfigurable NV logic circuit based on hybrid CMOS/STT-MTJ design. Indeed, our circuit can adapt on-demand its structure, thus offering intrinsic flexibility to perform basic logic functions (i.e. AND/OR/XOR) by a single circuit architecture. Post-layout simulation results prove that the proposed circuit leads to increase both delay and energy consumption with respect to state-of-the-art non-reconfigurable designs. However, its reconfigurable operation capability is very attractive to reduce area occupation and to increase design flexibility of NV-LIM systems.

Original language	English
Title of host publication	2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728134277
DOIs	https://doi.org/10.1109/LASCAS45839.2020.9069027
State	Published - Feb 2020
Event	11th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2020 - San Jose, Costa Rica Duration: 25 Feb 2020 → 28 Feb 2020

Publication series

Name	2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020

Conference

Conference	11th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2020
Country/Territory	Costa Rica
City	San Jose
Period	25/02/20 → 28/02/20

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Magnetic tunnel junction (MTJ)
logic-in-memory (LIM)
non-volatile logic gates
spin-transfer torque (STT)

Access to Document

10.1109/LASCAS45839.2020.9069027

Cite this

Garzon, E., Zambrano, B., Moposita, T., Taco, R., Procel, L. M., & Trojman, L. (2020). Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications. In 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020 Article 9069027 (2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/LASCAS45839.2020.9069027

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title = "Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications",

abstract = "The unique properties of spin-transfer torque magnetic tunnel junctions (STT-MTJs) have led to promising designs for logic and memory applications. Additionally, STT-MTJ based circuits have shown attractive potential to design efficient non-volatile logic-in-memory (NV-LIM) architectures, which assure low power and increased speed. This paper proposes a bit-level reconfigurable NV logic circuit based on hybrid CMOS/STT-MTJ design. Indeed, our circuit can adapt on-demand its structure, thus offering intrinsic flexibility to perform basic logic functions (i.e. AND/OR/XOR) by a single circuit architecture. Post-layout simulation results prove that the proposed circuit leads to increase both delay and energy consumption with respect to state-of-the-art non-reconfigurable designs. However, its reconfigurable operation capability is very attractive to reduce area occupation and to increase design flexibility of NV-LIM systems.",

keywords = "Magnetic tunnel junction (MTJ), logic-in-memory (LIM), non-volatile logic gates, spin-transfer torque (STT)",

author = "Esteban Garzon and Benjamin Zambrano and Tatiana Moposita and Ramiro Taco and Procel, \{Luis Miguel\} and Lionel Trojman",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 11th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2020 ; Conference date: 25-02-2020 Through 28-02-2020",

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Garzon, E, Zambrano, B, Moposita, T, Taco, R, Procel, LM & Trojman, L 2020, Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications. in 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020., 9069027, 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020, Institute of Electrical and Electronics Engineers Inc., 11th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2020, San Jose, Costa Rica, 25/02/20. https://doi.org/10.1109/LASCAS45839.2020.9069027

Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications. / Garzon, Esteban; Zambrano, Benjamin; Moposita, Tatiana et al.
2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020. Institute of Electrical and Electronics Engineers Inc., 2020. 9069027 (2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications

AU - Garzon, Esteban

AU - Zambrano, Benjamin

AU - Moposita, Tatiana

AU - Taco, Ramiro

AU - Procel, Luis Miguel

AU - Trojman, Lionel

PY - 2020/2

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N2 - The unique properties of spin-transfer torque magnetic tunnel junctions (STT-MTJs) have led to promising designs for logic and memory applications. Additionally, STT-MTJ based circuits have shown attractive potential to design efficient non-volatile logic-in-memory (NV-LIM) architectures, which assure low power and increased speed. This paper proposes a bit-level reconfigurable NV logic circuit based on hybrid CMOS/STT-MTJ design. Indeed, our circuit can adapt on-demand its structure, thus offering intrinsic flexibility to perform basic logic functions (i.e. AND/OR/XOR) by a single circuit architecture. Post-layout simulation results prove that the proposed circuit leads to increase both delay and energy consumption with respect to state-of-the-art non-reconfigurable designs. However, its reconfigurable operation capability is very attractive to reduce area occupation and to increase design flexibility of NV-LIM systems.

AB - The unique properties of spin-transfer torque magnetic tunnel junctions (STT-MTJs) have led to promising designs for logic and memory applications. Additionally, STT-MTJ based circuits have shown attractive potential to design efficient non-volatile logic-in-memory (NV-LIM) architectures, which assure low power and increased speed. This paper proposes a bit-level reconfigurable NV logic circuit based on hybrid CMOS/STT-MTJ design. Indeed, our circuit can adapt on-demand its structure, thus offering intrinsic flexibility to perform basic logic functions (i.e. AND/OR/XOR) by a single circuit architecture. Post-layout simulation results prove that the proposed circuit leads to increase both delay and energy consumption with respect to state-of-the-art non-reconfigurable designs. However, its reconfigurable operation capability is very attractive to reduce area occupation and to increase design flexibility of NV-LIM systems.

KW - Magnetic tunnel junction (MTJ)

KW - logic-in-memory (LIM)

KW - non-volatile logic gates

KW - spin-transfer torque (STT)

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Y2 - 25 February 2020 through 28 February 2020

ER -

Garzon E, Zambrano B, Moposita T, Taco R, Procel LM, Trojman L. Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications. In 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020. Institute of Electrical and Electronics Engineers Inc. 2020. 9069027. (2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020). doi: 10.1109/LASCAS45839.2020.9069027

Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications

Abstract

Publication series

Conference

UN SDGs

Keywords

Access to Document

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