Temperature study of defect generation, under channel hot carrier stress for 35-nm gate length MOSFETs using the Defect-Centric perspective

L. M. Procel, L. Trojman, F. Crupi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this work, we present an analysis to separate the interface states generation from the oxide traps generation during channel hot carrier degradation, for several temperatures. At first, we use the defect-centric framework in order to extract the total number of traps generated during the channel hot carrier stress. Then, we study the exponent of the power law of the number of traps in function of the stress time. Under this analysis, we can extract the ratio of generated interface states with respect to the oxide traps caused by the CHC degradation. Finally, we found that interface states are twice larger than oxide traps, which can be explained by extracting the activation energy for both generation processes.

Original languageEnglish
Title of host publicationProceedings of the 2016 IEEE ANDESCON, ANDESCON 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509025312
DOIs
StatePublished - 27 Jan 2017
Event2016 IEEE ANDESCON, ANDESCON 2016 - Arequipa, Peru
Duration: 19 Oct 201621 Oct 2016

Publication series

NameProceedings of the 2016 IEEE ANDESCON, ANDESCON 2016

Conference

Conference2016 IEEE ANDESCON, ANDESCON 2016
Country/TerritoryPeru
CityArequipa
Period19/10/1621/10/16

Keywords

  • channel hot carrier degradation
  • defect centrict framework
  • interface states
  • oxide traps

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