@inproceedings{93eeb8e919154a78a5d17ff01ad801a3,
title = "TFET and FinFET Hybrid Technologies for SRAM Cell: Performance Improvement over a Large VDD-Range",
abstract = "This work proposes and compares Static Random-Access Memory (SRAM) cells using hybrid technology for enabling a large range of voltage operation. Tunnel FET (TFET), FinFET, and conventional MOSFET (CMOS) technologies are considered to build different hybrid SRAM cells: TFET/CMOS, FinFET /CMOS and FinFET/TFET. In all cases, only CMOS and FinFET are used as cross-coupled inverters. For our study, four SRAM topologies (6T, 8T, 9T, 10T) were considered and the simulation was carried out for voltage range from 0.4V to 0.8V. The determination of the Writing and Reading Margin, the Delay and the Power Consumption of each device, enable us to determine that the best trade-off for hybrid is the FinFET/TFET SRAM.",
keywords = "CMOS, Delay, FinFET, Hybrid, Power Consumption, SRAM, Static Noise Margin, TFET, Write Noise Margin",
author = "Romain Liautard and Lionel Trojman and Adriana Arevalo and Procel, \{Luis Miguel\}",
note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 4th IEEE Ecuador Technical Chapters Meeting, ETCM 2019 ; Conference date: 13-11-2019 Through 15-11-2019",
year = "2019",
month = nov,
doi = "10.1109/ETCM48019.2019.9014896",
language = "Ingl{\'e}s",
series = "2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2019 IEEE 4th Ecuador Technical Chapters Meeting, ETCM 2019",
}