@inproceedings{badd397c220b4ba5b9b629cdd86478f7,
title = "A Low-Power 4-bit Tracking-Type Analog-to-Digital Converter in SKY130 Process",
abstract = "This paper presents the design and full-custom layout implementation of a 4-bit Tracking-Type Analog-to-Digital Converter (TT-ADC) using the SKY130 130 nm CMOS process. The proposed architecture mainly integrates a rail-to-rail analog comparator and a multiplexed resistor-string Digital-to-Analog Converter (DAC), combined with a synchronous controller and an output register. Unlike traditional tracking ADCs, this work introduces a fully integrated mixed-signal design optimized for both bandwidth and power efficiency, and evaluated under process-temperature-voltage variations accounting for layout parasitics. Simulations show that the proposed TT-ADC presents a bandwidth of 150 MHz while consuming only 505 μ of power. Compared to prior 4-bit implementations, the proposed design achieves over 2 × improvement in bandwidth and an 87\% reduction in power consumption. The area footprint is about 54.9 μ × 29.3 μ, making it highly suitable for energyconstrained, high-speed embedded applications.",
keywords = "ADC, Layout, Open-Source, Rail-toRail Comparator, Resistor-String DAC, SKY130, Synchronous Up/Down Counter, TT-ADC",
author = "Esteban Astudillo and Eduardo Holgu{\'i}n and Esteban Garz{\'o}n and Pr{\'o}cel, \{Luis Miguel\}",
note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 33rd IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2025 ; Conference date: 12-10-2025 Through 15-10-2025",
year = "2025",
doi = "10.1109/VLSI-SoC64688.2025.11421767",
language = "Ingl{\'e}s",
series = "IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC",
publisher = "IEEE Computer Society",
booktitle = "2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration, VLSI-SoC 2025",
}