Design of a Gate Driver Based-on E-mode p-GaN HEMTs Handling 650V/10A GaN Power Device

This paper presents the design of a monolithically integrated Gallium Nitride (GaN)-IC gate driver based on Enhancement-mode p-GaN HEMT technology. The design uses 650V GaN-on-SOI Process Designing Kit (PDK). The design complexity of this technology lies in the absence of p-type devices. Consequently, Resistor-Transistor Logic (RTL) inverters and Push-Pull Buffers are introduced instead of a complementary logic. To effectively handle the power device (650V/10A) switching, the gate driver is sized to achieve 7V in the output. To validate the performance of the proposed gate driver, transistor-level and post-layout simulations are carried out considering an input signal of 2MHz. Turn-on/turn-off time (3.77ns/2.32ns), overall circuit efficiency (99.3%) and temperature variation effects are analysed.