TY - GEN
T1 - Implementation and optimization of the algorithm of automatic color enhancement in digital images
AU - Romero, Juan Sebastian
AU - Procel, Luis Miguel
AU - Trojman, Lionel
AU - Verdier, Damien
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/7/1
Y1 - 2017/7/1
N2 - This paper studies the implementation of an algorithm to enhance the color of an image by considering global and local effects. The implementation is done on Matlab((and also on a FPGA using VHDL. The algorithm is called ACE (automatic color equalization). The paper presents the optimization of the algorithm using a subset or window. The algorithm performs the color enhancement automatically by equalizing the colors and improving the image. The results show an image with more contrast, higher number of details and visually better. Indeed, ACE maximizes the information of the image. The optimization of the algorithm reduces the complexity of the original one. Additionally, the VHDL implementation is quite faster than Matlab's.
AB - This paper studies the implementation of an algorithm to enhance the color of an image by considering global and local effects. The implementation is done on Matlab((and also on a FPGA using VHDL. The algorithm is called ACE (automatic color equalization). The paper presents the optimization of the algorithm using a subset or window. The algorithm performs the color enhancement automatically by equalizing the colors and improving the image. The results show an image with more contrast, higher number of details and visually better. Indeed, ACE maximizes the information of the image. The optimization of the algorithm reduces the complexity of the original one. Additionally, the VHDL implementation is quite faster than Matlab's.
UR - http://www.scopus.com/inward/record.url?scp=85046257197&partnerID=8YFLogxK
U2 - 10.1109/ROPEC.2017.8261651
DO - 10.1109/ROPEC.2017.8261651
M3 - Contribución a la conferencia
AN - SCOPUS:85046257197
T3 - 2017 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2017
SP - 1
EP - 6
BT - 2017 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 IEEE International Autumn Meeting on Power, Electronics and Computing, ROPEC 2017
Y2 - 8 November 2017 through 10 November 2017
ER -