Live demo: An 88FJ / 40 MHz [0.4V] - 0.61PJ / 1GHz [0.9V] dual mode logic 8x8-bit multiplier accumulator with a self-adjustment mechanism in 28 nm FD-SOI

Ramiro Taco, Itamar Levi, Marco Lanuzza, Alexander Fish

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

2 Citas (Scopus)

Resumen

The unique ability of dual mode logic (DML) to self-adapt to computational needs by providing high speed and/or low energy consumption is demonstrated for the first time by silicon measurements in 28nm FD-SOI. At the gate level, the DML design offers the possibility to operate either in the static mode to save energy, or in the dynamic mode to increase speed albeit with higher delay or energy consumption, respectively. In this demonstration, the two operational modes are dynamically managed by a self-adjustment mechanism to increase speed or reduce energy of the design at run-time. As a test case a two-stage pipelined multiply-accumulate (MAC) circuit was selected to assess the advantages of DML in terms of speed, energy and area as compared to a conventional CMOS design. We show that the self-adjusted DML MAC achieves both a performance boost of up to 92% and 16% less energy consumption than the equivalent standard CMOS implementation. The energy saved can be even greater (-35%) when the low-power (fully static) mode is enabled. In addition, the DML MAC occupies 25% less area.

Idioma originalInglés
Título de la publicación alojada2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
EditorialInstitute of Electrical and Electronics Engineers Inc.
ISBN (versión digital)9781728103976
DOI
EstadoPublicada - 2019
Publicado de forma externa
Evento2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japón
Duración: 26 may. 201929 may. 2019

Serie de la publicación

NombreProceedings - IEEE International Symposium on Circuits and Systems
Volumen2019-May
ISSN (versión impresa)0271-4310

Conferencia

Conferencia2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
País/TerritorioJapón
CiudadSapporo
Período26/05/1929/05/19

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