TY - GEN
T1 - New Insight for next Generation SRAM
T2 - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019
AU - Arevalo, Adriana
AU - Liautard, Romain
AU - Romero, Daniel
AU - Trojman, Lionel
AU - Procel, Luis Miguel
N1 - Publisher Copyright:
© 2019 Association for Computing Machinery.
PY - 2019/8/26
Y1 - 2019/8/26
N2 - The purpose of this work is to point out the main differences between a Static Random-Access Memory (SRAM) cells implemented by using Tunnel FET (TFET) and FinFET technologies. We have compared the behavior of SRAM cells implemented in both technologies cells for a supply voltage range from 0.4V to 1.2V. Furthermore, for our study, we have chosen different SRAM cell topologies, such as 6T, 8T, 9T and 10T. Therefore, we have simulated all of these topologies for both technologies and extracted the Static Noise Margins (SNM) for the reading and writing processes. In addition, we have determined the power consumption in order to find the best trade-off between stability and power. By analyzing these results, we have determined the best topology for each technology. Finally, we have compared these best topologies for each technology in order to perform a study of advantages and shortcomings. Our results show more advantages using TFET technology instead of FinFET one.
AB - The purpose of this work is to point out the main differences between a Static Random-Access Memory (SRAM) cells implemented by using Tunnel FET (TFET) and FinFET technologies. We have compared the behavior of SRAM cells implemented in both technologies cells for a supply voltage range from 0.4V to 1.2V. Furthermore, for our study, we have chosen different SRAM cell topologies, such as 6T, 8T, 9T and 10T. Therefore, we have simulated all of these topologies for both technologies and extracted the Static Noise Margins (SNM) for the reading and writing processes. In addition, we have determined the power consumption in order to find the best trade-off between stability and power. By analyzing these results, we have determined the best topology for each technology. Finally, we have compared these best topologies for each technology in order to perform a study of advantages and shortcomings. Our results show more advantages using TFET technology instead of FinFET one.
KW - FinFET
KW - Low Voltage
KW - SRAM memory
KW - Stability Analysis
KW - Static Noise Margins
KW - Tunnel-FET
UR - http://www.scopus.com/inward/record.url?scp=85073429270&partnerID=8YFLogxK
U2 - 10.1145/3338852.3339871
DO - 10.1145/3338852.3339871
M3 - Contribución a la conferencia
AN - SCOPUS:85073429270
T3 - Proceedings - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019
BT - Proceedings - 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019
PB - Association for Computing Machinery, Inc
Y2 - 26 August 2019 through 30 August 2019
ER -