Relaxing Sensing Margins in Double-Barrier Magnetic Tunnel Junction for Energy-Efficient Smart Material Implication (SIMPLY) Scheme Operating at 77K

This paper explores the impact on reliability and energy-efficiency in double-barrier magnetic tunnel junctions (DMTJs)-based smart material implication (SIMPLY) scheme operating at cryogenic temperatures (77 K). Our study is carried out through a macrospin-based Verilog-A compact model of DMTJ, along with a 65 nm commercial process design kit (PDK) calibrated down to 77 K under silicon measurements. This study evaluates the effects of adjusting the bias voltage. Energy-efficient SIMPLY operations can be achieved by relaxing the bias voltage, and thereby the read sensing margins. DMTJ-based SIMPLY and sFALSE schemes allows energy savings of about 29.2% and 35%, respectively. We then utilized the SIMPLY and sFALSE logic schemes to assess energy savings in logic operations. These results indicate that DMTJ-based cells under cryogenic conditions are a promising alternative for logic-in-memory (LiM) architectures.