TY - JOUR
T1 - Threshold voltage degradation for n-channel 4H-SiC power MOSFETs
AU - Guevara, Esteban
AU - Herrera-Pérez, Victor
AU - Rocha, Cristian
AU - Guerrero, Katherine
N1 - Publisher Copyright:
© 2020 by the authors. Licensee MDPI, Basel, Switzerland.
PY - 2020/3
Y1 - 2020/3
N2 - In this study, threshold voltage instability on commercial silicon carbide (SiC) power metal oxide semiconductor field electric transistor MOSFETs was evaluated using devices manufactured from two different manufacturers. The characterization process included PBTI (positive bias temperature instability) and pulsed IV measurements of devices to determine electrical parameters’ degradations. This work proposes an experimental procedure to characterize silicon carbide (SiC) power MOSFETs following two characterization methods: (1) Using the one spot drop down (OSDD) measurement technique to assess the threshold voltage explains temperature dependence when used on devices while they are subjected to high temperatures and different gate voltage stresses. (2) Measurement data processing to obtain hysteresis characteristics variation and the damage effect over threshold voltage. Finally, based on the results, it was concluded that trapping charge does not cause damage on commercial devices due to reduced value of recovery voltage, when a negative small voltage is applied over a long stress time. The motivation of this research was to estimate the impact and importance of the bias temperature instability for the application fields of SiC power n-MOSFETs. The importance of this study lies in the identification of the aforementioned behavior where SiC power n-MOSFETs work together with complementary MOS (CMOS) circuits.
AB - In this study, threshold voltage instability on commercial silicon carbide (SiC) power metal oxide semiconductor field electric transistor MOSFETs was evaluated using devices manufactured from two different manufacturers. The characterization process included PBTI (positive bias temperature instability) and pulsed IV measurements of devices to determine electrical parameters’ degradations. This work proposes an experimental procedure to characterize silicon carbide (SiC) power MOSFETs following two characterization methods: (1) Using the one spot drop down (OSDD) measurement technique to assess the threshold voltage explains temperature dependence when used on devices while they are subjected to high temperatures and different gate voltage stresses. (2) Measurement data processing to obtain hysteresis characteristics variation and the damage effect over threshold voltage. Finally, based on the results, it was concluded that trapping charge does not cause damage on commercial devices due to reduced value of recovery voltage, when a negative small voltage is applied over a long stress time. The motivation of this research was to estimate the impact and importance of the bias temperature instability for the application fields of SiC power n-MOSFETs. The importance of this study lies in the identification of the aforementioned behavior where SiC power n-MOSFETs work together with complementary MOS (CMOS) circuits.
KW - Hysteresis
KW - Pulsed IV measurements
KW - Recovery voltage
KW - Silicon carbide MOSFET
KW - Stress modeling
KW - Threshold voltage
UR - http://www.scopus.com/inward/record.url?scp=85077893628&partnerID=8YFLogxK
U2 - 10.3390/jlpea10010003
DO - 10.3390/jlpea10010003
M3 - Artículo
AN - SCOPUS:85077893628
SN - 2079-9268
VL - 10
JO - Journal of Low Power Electronics and Applications
JF - Journal of Low Power Electronics and Applications
IS - 1
M1 - 3
ER -