Threshold voltage degradation for n-channel 4H-SiC power MOSFETs

Esteban Guevara, Victor Herrera-Pérez, Cristian Rocha, Katherine Guerrero

Producción científica: Contribución a una revistaArtículorevisión exhaustiva

4 Citas (Scopus)

Resumen

In this study, threshold voltage instability on commercial silicon carbide (SiC) power metal oxide semiconductor field electric transistor MOSFETs was evaluated using devices manufactured from two different manufacturers. The characterization process included PBTI (positive bias temperature instability) and pulsed IV measurements of devices to determine electrical parameters’ degradations. This work proposes an experimental procedure to characterize silicon carbide (SiC) power MOSFETs following two characterization methods: (1) Using the one spot drop down (OSDD) measurement technique to assess the threshold voltage explains temperature dependence when used on devices while they are subjected to high temperatures and different gate voltage stresses. (2) Measurement data processing to obtain hysteresis characteristics variation and the damage effect over threshold voltage. Finally, based on the results, it was concluded that trapping charge does not cause damage on commercial devices due to reduced value of recovery voltage, when a negative small voltage is applied over a long stress time. The motivation of this research was to estimate the impact and importance of the bias temperature instability for the application fields of SiC power n-MOSFETs. The importance of this study lies in the identification of the aforementioned behavior where SiC power n-MOSFETs work together with complementary MOS (CMOS) circuits.

Idioma originalInglés
Número de artículo3
PublicaciónJournal of Low Power Electronics and Applications
Volumen10
N.º1
DOI
EstadoPublicada - mar. 2020
Publicado de forma externa

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